Sufeng GuoRESEARCH & ENGINEERING
Let's talk
A PERSONAL FIELD GUIDE AI SYSTEMS & SILICON / 2026

Undergraduate researcher · Nanjing University

Giving intelligence form, from systems to the core.

I design autonomous AI systems and efficient computing hardware, with a focus on long-horizon agents, DNN scheduling, RTL, and evidence-driven engineering.

Explore selected work GitHub
Move through the garden. Click a painting to wake it. Tap a painting. Each has its own little surprise.
AUTONOMOUS AI AI ACCELERATORS DNN SCHEDULING HARDWARE–SOFTWARE CO-DESIGN

01 / ABOUT

From layer to line, I learn by design.

WHAT I WORK WITH

  • Python
  • C / C++
  • SystemVerilog
  • TypeScript
  • React
  • Linux
  • Vivado / XSim
  • Verilator
  • Icarus Verilog
  • Yosys / OpenSTA
  • Spectre
  • ONNX

I'm Sufeng, a VLSI Design & System Integration undergraduate at Nanjing University. I like problems that require crossing boundaries—from algorithms and agent runtimes to architecture and transistors.

EDUCATION

2023.09—2027.06 NANJING, CHINA / SUZHOU, CHINA Nanjing University B.Eng. candidate · VLSI Design & System Integration

CURRENT & NEXT

2026.09—2026.12 BEIJING, CHINA Microsoft Research Asia Research Intern · Systems Research Group 2027.01—2027.05 SINGAPORE Nanyang Technological University Government-Sponsored Visiting Undergraduate Program

02 / SELECTED WORK

Build with intent; test every event.

P.01 / MIXED PRECISION
Active development AWQ W4A16SystemVerilog

ACE-3 MP

Native AWQ W4A16 research RTL with verified G128 projection building blocks, evidence across all 624 official decoder tensors, and stage-gated integration review.

View repository
NATIVE AWQW4A16 / RTL
24decoder layers 624official tensors
CONCEPTUAL ILLUSTRATION · NOT A DIE PHOTO
P.02 / PERSISTENT RTL
SystemVerilogW4A8Qwen2.5

ACE-2

A persistent W4A8 RTL dialogue baseline: two turns, four generated tokens per turn, 24 retained K/V layers, no prefix recomputation or software fallback, and zero recorded mismatches.

View repository
P.03 / DIGITAL
SystemVerilogFPGADSP

64-Point FFT

A resource-efficient radix-2 DIT FFT using folded streaming SDF RTL, Q1.15 arithmetic, and Python/NumPy co-verification.

View repository
P.04 / ANALOG
TSMC 180nmSpectreCMOS

Two-Stage Op-Amp

A Miller-compensated CMOS operational amplifier with AC, DC, and transient verification across gain, bandwidth, stability, swing, and power.

View repository

03 / ARGUS ECOSYSTEM

Minds that align make horizons shine.

Open-source work spanning persistent agents, verified hardware, efficient local AI, and independently reviewed mathematics.

MY OPEN-SOURCE ORGANIZATION Argus-AiTeam Building persistent AI systems that extend human capability. 09 TEAM REPOSITORIES · 02 COLLABORATIONS Website GitHub
lbx154 Argus Self-evolving multi-agent system for continuous autonomous research. PYTHON · COLLABORATION↗ microsoft ArgusAgent Persistent, reviewed runtime for long-horizon research and engineering. PYTHON · COLLABORATION↗ Argus-AiTeam Argus Verticals Community domain packs that extend Argus with reviewed workflows, role guidance, skills, and completion gates. PYTHON · PLUGINS↗ Argus-AiTeam Argus-Pi Maintained Pi fork for Argus model requests, tool execution, context and session reliability, and task handoffs. TYPESCRIPT · HARNESS↗ Argus-AiTeam Argus Mathematics A public archive of reviewed or verified mathematical results, replayable checks, and research records. PYTHON · MATHEMATICS↗ Argus-AiTeam ACE-3 MP Native-AWQ W4A16 RTL with verified G128 projection blocks, 624-tensor decoder evidence, and stage-gated integration. SYSTEMVERILOG · AWQ↗ Argus-AiTeam Hilbert16 Observatory A bilingual observatory for two isolated Argus mathematical research processes. TEX · MATHEMATICS↗ Argus-AiTeam MiniMax-H3 Desktop Full MiniMax-H3 on one RTX A6000, producing 1344×768 video with synchronized stereo audio. PYTHON · CUDA↗ Argus-AiTeam ACE-2 Persistent W4A8 RTL dialogue baseline with two turns, 840 layer executions, retained K/V state, and zero scoreboard mismatches. SYSTEMVERILOG · RTL↗ Argus-AiTeam ComfyUI MiniMax-H3 MLX video and stereo audio nodes for ComfyUI on Apple Silicon. PYTHON · COMFYUI↗ Argus-AiTeam MiniMax-H3 Mac Deploying and accelerating MiniMax-H3 on Apple Silicon with unified memory. PYTHON · MLX↗

04 / RESEARCH

Ideas take flight when evidence comes to light.

My work connects agentic intelligence with the physical systems that run it.

2026 HyperCut Fast Inter-Layer Scheduling via Directed Hypergraph and Early Filtering PREPRINT · arXiv:2608.19296
01 / HYPERCUT Search less. Schedule better.
  1. DNN DAG
  2. Hypergraph
  3. HEM / FM
  4. Map state
  5. Early filter
  6. SET backend
2.0× EDP improvement 80.47% less search time A directed-hypergraph scheduler that preserves inter-layer dependencies while pruning expensive candidates before backend evaluation.
2026 Argus A General-Purpose Agentic Reasoning Runtime for Long-Horizon Tasks TECH REPORT · arXiv:2608.05144
02 / ARGUS + ACE Every result leaves evidence.
  1. Manager
  2. Planner
  3. Engineer
  4. Reviewer
PERSISTENT PROJECT STATE artifacts · tests · accepted evidence ACE-2 840 layers · 0 mismatch ACE-3 624 tensors · gated review A long-horizon engineering loop that separates planning, implementation, and independent review while preserving state across sessions.
arXiv profile ORCID

05 / CONNECT

Send out a sign; perhaps our paths align.

Research notes, project updates, videos, and the occasional idea in progress.

06 / CONTACT

Bring what is unknown; together, we’ll make it known.

sufeng_guo@smail.nju.edu.cn More links